Heretofore, the boron phosphide-based semiconductor layer, as disclosed in JP-A HEI 2-288388, for example, has been formed on a substrate made of a cubic zinc-blende crystal gallium phosphide (GaP) or silicon carbide (SiC) single crystal.
In JP-A HEI 2-288371 and JP-A HEI 2-275682, it is disclosed that the Light-Emitting Diode (LED) of a compound semiconductor device is composed of such a a boron phosphide-based semiconductor layer formed thereon, and a Group III nitride semiconductor layer disposed as bonded thereto. In U.S. Pat. No. 6,194,744 B1, it is disclosed that a boron phosphide-based semiconductor layer such as of monomeric Boron Phosphide (BP) is formed on a silicon single crystal (silicon) as a substrate. In U.S. Pat. No. 6,069,021, a technique of configuring an LED from a stacked structure provided with a silicon substrate, a monomeric BP layer, and a Group III nitride semiconductor layer disposed thereon is disclosed.
As disclosed in JP-A HEI 2-275682, in the configuration of the LED by the use of a boron phosphide-based semiconductor layer formed on a single crystal substrate, the ohmic electrodes have been heretofore disposed on a cubic zinc-blende crystal boron phosphide layer. As disclosed in JP-A HEI 4-84486, even in the conventional laser diode (LD), the ohmic electrodes are disposed as held in contact with a cubic boron phosphide layer.
Further, as disclosed in JP-B SHO 55-3834, the blue- and green LED's have been heretofore configured by utilizing a stacked structure provided with a Group III nitride semiconductor layer formed of gallium nitride (GaN) and disposed on a single crystal substrate. In JP-A HEI 4-213878, for example, the light-emitting part of the short wavelength visible or near ultraviolet or ultraviolet LED configured by the hetero-junction of a clad layer formed of a Group III nitride semiconductor material and a light-emitting layer is disclosed.
It is disclosed in JP-A HEI 10-287497 that even the Field Effect Transistor (FET) operating in the high frequency is configured by utilizing a stacked structure provided with a Group III nitride semiconductor layer such as of aluminum-gallium nitride (AlXGa1-XN: 0≦X≦1) disposed on a silicon substrate, for example.
Meanwhile, as disclosed in JP-A 2004-186291, an example of the technique of configuring the light-emitting part of a Double-Hetero (DH) structure using a cubic zinc blende crystal boron phosphide-based semiconductor layer as a clad layer has been known.
The light-emitting layer constituting a light-emitting part and the cubic boron phosphide-based semiconductor layer constituting a clad layer functioning as a barrier layer for the light-emitting layer can be formed, as disclosed in JP-A HEI 3-87019, by utilizing a cubic zinc-blende crystal gallium arsenide (GaAs) for an under layer.
Even when a substrate is formed of silicon and a boron phosphide-based semiconductor layer is grown on the surface formed of a (111) crystal face of the substrate, however, the layer consequently grown eventually contains crystalline defects, such as stacking faults and twins, in a large amount (T. Udagawa and G. Shimaoka, J. Ceramic Processing Res., (Republic of Korea), Vol. 4, No. 2, 2003, pp. 80-83). When a substrate is formed of a hexagonal 6H-type SiC and a monomeric BP layer is grown on a (0.0.0.1.) crystal face thereof, the layer consequently grown eventually contains crystalline defects, such as twins, in a large amount (T. Udagawa et al, Appl. Surf. Sci., (U.S.A), Vol 244, 2004, pp. 285-288). Even when using the stacked structure that is provided with the boron phosphide-based semiconductor layer containing such crystalline defects in a large amount, for example, there is the problem that the LED possessing high voltage in the reverse direction and manifesting a high efficiency in photoelectric conversion, for example, cannot be stably manufactured.
The GaN layer that is grown on a substrate of sapphire (α-Al2O3 single crystal), for example, contains crystalline defects, such as dislocations, in a large amount. Even when using the Group III nitride semiconductor layer containing crystalline defects, such as dislocations, in a large amount for a functional layer, such as a light-emitting layer, there is the problem that the produced LED will not be enabled to increase the voltage in the reverse direction or to enhance the efficiency of photoelectric conversion. Furthermore, for example, the configuration of the FET by utilizing as an electron transporting layer (channel layer) the Group III nitride semiconductor layer containing crystalline defects in a large amount entails the problem that the high-frequency properties, such as power output, will not be enhanced fully satisfactorily because of the failure to acquire high electron mobility.
The thin layers made of the conventional boron phosphide-based semiconductor material and Group III nitride semiconductor materials contain anti-phase boundaries (“Crystal Electron Microscopy,” written by Hiroyasu Saka and published by Uchida Rokakuho Co., Ltrd., on Nov. 25, 1997, first edition, pp. 64-65) (Y Abe et al, Journal of Crystal Growth (Holland), Vol 283, 2005, pp. 41-47). Heretofore, the compound semiconductor devices have not been always manufactured by utilizing semiconductor layers of superior quality excelling in crystallinity. Incidentally, the term “Anti-Phase Domain” (APD) or “Anti-Phase Boundary” (APB) used herein refers to a boundary in which the phase regarding the arrangement of atoms in a crystal is deviated by 180 degrees (half cycle). This boundary frequently occurs in the ordered phase of a binary alloy.
The boron phosphide-based crystal layer and the Group III nitride semiconductor layer which contain the anti-phase boundaries in a large amount and reveal inferior crystallinity hinder the effort to obtain the LED excelling in efficiency of light emission and the FET excelling in electrical properties with sufficient stability.
Even when the ohmic electrodes are disposed contiguously to a cubic boron phosphide-based semiconductor layer containing crystalline defects in a large amount, they entail the problem that the LED possessing a high voltage in the reverse direction and manifesting a high efficiency of photoelectric conversion will not be stably manufactured because the operating current for operating the device (device-operating current) incurs desirable leakage via crystalline defects, such as twins. Even when Schottky contact is disposed on the surface of a cubic boron phosphide-based semiconductor layer abounding in crystalline defects, they entail the problem that the FET excelling in high-frequency properties will not be stably produced because the gate electrode suffering from great leakage current and deficient breakdown voltage is formed eventually and the drain current manifests an inferior pinch-off property.
Though it has been disclosed as mentioned above that the light-emitting part of the short wavelength visible or near ultraviolet or ultraviolet LED can be configured by the hetero junction of a clad layer formed of a Group III nitride semiconductor material and a light-emitting layer, the boron phosphide-based semiconductor layer formed on the under layer made of the conventional cubic crystal eventually becomes a crystal layer which contains crystalline defects in a large amount because of insufficient lattice matching with the under layer. The layer in question, for example, entails the problem that, owing to the mismatching of lattice with the under layer, it will eventually become a crystalline layer containing plane defects, such as twins and stacking faults copiously. When the light-emitting part of the LED is manufactured by using as the clad layer, for example, the boron phosphide-based semiconductor layer copiously containing such crystalline defects, no success has yet been achieved in producing stably the LED of high luminance because the occurrence of the short-circuit flow of the current for operating the LED to the light-emitting layer prevents the surface area for light emission from being expanded.
This invention has been produced in view of the true state of the prior art mentioned above and is directed toward the following aims.
(1) This invention is aimed at providing a semiconductor device capable of enabling a boron phosphide-based semiconductor layer to contain crystalline defects, such as twins and stacking faults, only in a small density and excel in crystallinity and capable of enhancing the various properties of the device by making use of the boron phosphide-based semiconductor layer.
(2) This invention is further aimed at providing a compound semiconductor device capable of obtaining a stacking structure provided with a semiconductor layer excelling in crystallinity even when it is furnished on a substrate with a Group III nitride semiconductor layer containing crystalline defects in a large amount and capable of enhancing the characteristic properties of the device.
(3) This invention is further aimed at providing a compound semiconductor device capable of producing a compound semiconductor device excelling in optical properties and electrical properties by making use of a thin layer made of a boron phosphide-based semiconductor material of superior quality containing anti-phase boundaries only in a small amount or a Group III nitride semiconductor material.
(4) This invention is further aimed at providing a semiconductor device furnished with a boron phosphide-based semiconductor layer capable of decreasing the leak of the device-operating current, heightening the efficiency of photoelectric conversion as a light-emitting device, heightening the voltage in the reverse direction, imparting high breakdown voltage to the gate electrode as a field effect transistor, and improving the pinch-off property of the drain current.
(5) This invention is further aimed at providing a semiconductor light-emitting device capable of configuring a clad layer constituting the light-emitting part of a DH structure with a boron phosphide-based semiconductor layer of superior quality containing crystalline defects only in a small amount and enhancing the light-emitting property.